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Cypress Semiconductor /psoc63 /SMARTIO /PRT[5] /DU_SEL

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Interpret as DU_SEL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DU_TR0_SEL 0DU_TR1_SEL 0DU_TR2_SEL 0DU_DATA0_SEL 0DU_DATA1_SEL

Description

Data unit component input selection

Fields

DU_TR0_SEL

Data unit input signal ‘tr0_in’ source selection: ‘0’: Constant ‘0’. ‘1’: Constant ‘1’. ‘2’: Data unit output. ‘10-3’: LUT 7 - 0 outputs. Otherwise: Undefined.
DU_TR1_SEL

Data unit input signal ‘tr1_in’ source selection. Encoding is the same as for DU_TR0_SEL.
DU_TR2_SEL

Data unit input signal ‘tr2_in’ source selection. Encoding is the same as for DU_TR0_SEL.
DU_DATA0_SEL

Data unit input data ‘data0_in’ source selection: ‘0’: Constant ‘0’. ‘1’: chip_data[7:0]. ‘2’: io_data_in[7:0]. ‘3’: DATA.DATA MMIO register field.
DU_DATA1_SEL

Data unit input data ‘data1_in’ source selection. Encoding is the same as for DU_DATA0_SEL.

Links

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Register License

Copyright 2016-2018 Cypress Semiconductor Corporation \n Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License.
You may obtain a copy of the License at \n
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and
limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data